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FPGA
FIFO Generator (First Word Fall Thru FIFO)
[1] Project
1. Block Design of FIFO Generator Project
2. IP Configuration
(1) Basic
FIFO Implementation ⇨ Common Clock Block RAM
- FIFO read/write operations are performed in the same clock domain.
- FIFO is implemented using the Block RAM resources inside the FPGA.
(2) Native Ports
- FIFO Read Mode ⇨ First Word Fall Through
- The first data in the FIFO appears on the FIFO Read Data output even if the Read Enable signal is not set.
- Data Port Parameters
- Write Width ⇨ 8
Sets the write unit of the FIFO to 8 bits. - Write Depth ⇨ 1024
Configures the FIFO to store up the 1024 entries of 8-bit data (8 x 1024) - Read Width ⇨ 8
Sets the read unit of the FIFO to 8 bits.
(3) Status Flags
(4) Data Counts
- Data Count
- Currently, the number of data entries stored in the FIFO can be checked.
(5) Summary
In the figure above, the Read mode is First Word Fall Through, not Standard FIFO.
[2] Module & TestBench
1. Top module
2. TestBench
- @(posedge clk)
@(posedge clk) is a statement used to wait for the rising edge of the clock signal clk.
For important considerations when using this statement, refer to the following link: Link.
- Clock Synchronization in Testbench
When designing RTL with flip-flops synchronized to a clock, non-blocking assignment (<=) is used.
Similarly, in a testbench, when providing clock-synchronized inputs to the DUT, non-blocking assignments should be used to ensure the inputs are synchronized with the clock.
If inputs are assigned using blocking assignments (=), Vivado Simulation will interpret them as level signals that are asynchronous to the clock.
[3] Simulation
1. Simulation Waveform
Using the FIFO Generator IP, an FWFT (First Word Fall Through) FIFO was created.
The following describes the operational characteristics of the FWFT FIFO:
- The first Write Data, 7, is written to the FIFO.
- At the 70 ns mark, the FIFO captures and stores the value 7.
- After two clock cycles, at the 90 ns mark, the value 7 is output on the Read Data port.
By using the FWFT FIFO, downstream IPs can access the first data in the FIFO without performing a separate FIFO Read operation.